Implicit Acceleration of Critical Sections via Unsuccessful Speculation

The speculative execution of critical sections, whether done using HTM via the transactional lock elision pattern or using a software solution such as STM or a sequence lock, has the potential to improve software performance with minimal programmer effort. The technique improves performance by allowing critical sections to proceed in parallel as long as they do not conflict at run time. In this work we experimented with software speculative executions of critical sections on the STAMP benchmark suite and found that such speculative executions can improve overall performance even when they are unsuccessful — and, in fact, even when they cannot succeed. Our investigation used the Oracle Adaptive Lock Elision (ALE) library which supports the integration of multiple speculative execution methods (in hardware and in software). This software suite collects extensive performance statistics; these statistics shed light on the interaction between these speculative execution methods and their effect on performance. Inspection of these statistics revealed that unsuccessful speculative executions can accelerate the performance of the program for two reasons: they can significantly reduce the time the lock is held in the subsequent non-speculative execution of the critical section by prefetching memory needed for that execution; additionally, they affect the interleaving between threads trying to acquire the lock, thus serving as a back-off and fairness mechanism. This paper describes our investigation and demonstrates how these factors affect the behavior of multiple STAMP benchmarks.